JPH0423179U - - Google Patents
Info
- Publication number
- JPH0423179U JPH0423179U JP6221890U JP6221890U JPH0423179U JP H0423179 U JPH0423179 U JP H0423179U JP 6221890 U JP6221890 U JP 6221890U JP 6221890 U JP6221890 U JP 6221890U JP H0423179 U JPH0423179 U JP H0423179U
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- circuit package
- shelf
- cable
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003780 insertion Methods 0.000 claims 1
- 230000037431 insertion Effects 0.000 claims 1
- 238000005192 partition Methods 0.000 claims 1
Landscapes
- Insertion, Bundling And Securing Of Wires For Electric Apparatuses (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6221890U JPH0423179U (en]) | 1990-06-14 | 1990-06-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6221890U JPH0423179U (en]) | 1990-06-14 | 1990-06-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0423179U true JPH0423179U (en]) | 1992-02-26 |
Family
ID=31591163
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6221890U Pending JPH0423179U (en]) | 1990-06-14 | 1990-06-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0423179U (en]) |
-
1990
- 1990-06-14 JP JP6221890U patent/JPH0423179U/ja active Pending
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